Novel Approach and Methods for Optimizing Highly Sensitive Low Noise Amplifier CMOS IC Design for Congested RF Environments

This work details the optimization and evaluation of a CMOS low-noise amplifier by developing new algorithm for gm/ID approach combining with modified figure merit index method. The includes on-chip matching elements (such as IC inductors) resonance at targeted frequencies. simulation results optimized LNA model showed scattering parameter S21 = 19.91 dB, noise NF 3.54 dB excellent linearity third-order intermodulation IIP3 5.89 dBm frequency f0 2.4 GHz.